Job Search Results for "* Asic Design" Jobs

Altera | San Jose, CA

Principal ASIC Design Engineer Location: US-CA-San Jose Requisition ID: 2322 # of openings: 1 Description As a Principal ASIC Design Engineer, your charter will be to drive full-chip and block level RTL-to-GDS implementation activities and methodologies for Altera’s next generation FPG...

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LSI Logic Corporation | Milpitas, CA

Requisition Number: 12-8983 Job Title: ASIC Design Engineer Country: USA State/Province/County: California City: Milpitas Requirements/Qualifications (Education): B.S. required, MS/Ph.D. a plus. 0-2 years of experience. Job Description: LSI is an exciting place to work and we are expanding. The A...

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Altera | San Jose, CA

ASIC Physical Design Engineer, Sr. MTS Location: US-CA-San Jose Requisition ID: 2245 # of openings: 1 Description As a Senior MTS, ASIC Physical Design Engineer, you will be expected to have a strong background of ASIC backend design. Your main responsibilities will include defining and implementi...

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Qualcomm | San Diego, CA

will specify and design digital ASIC blocks that will... low power design, test plan development, coverage-based design verification, and/or design-for-test (DFT... ...

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AllowTech Inc. | Agoura Hills, CA

FPGA design/verification (no new graduates). AllowTech is a leading provider of cutting edge FPGA design... RTL design experience • Xilinx/Altera design tools... ...

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ON Semiconductor | Gresham, OR

Layer definition and design kit development... a plus. •Experience in developing deep submicron ASIC technologies on SOI. •Understanding of CMOS active... ...

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Qualcomm | San Diego, CA

Digital Design Engineers with Bus design expertise... detailed knowledge of ASIC design including architecture, verification of integrated systems, RTL design... ...

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Seagate | Shakopee, MN

and design for Seagate's emerging enterprise disc drive products. Work on integrating support for NAND Flash devices and enhance Disc Controller design to... ...

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Radisys Corporation | Hillsboro, OR

future Radisys product designs/products. Developing... to radisys NPI MPM, H/W Design Engineering, and CTO Teams. Driving “up front” design for cost activities... ...

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ON Semiconductor | Gresham, OR

on SOI and bulk substrates. •Layer definition and design kit development. Position Requirements •> 10... in developing deep submicron ASIC technologies on SOI... ...

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